LS3B6000M
LS3B6000M
Loongson 3B6000M is a general-purpose 8-core SoC designed for mobile terminal applications. It utilizes the independently designed instruction set architecture (LoongArch?) and is built upon the self-developed LA364E cores. The SPEC CPU 2006 Base single-thread integer/floating-point peak performance both exceed 10 points/GHz, which is equivalent to the LA464 cores used in the LS3A5000; The processor comes with the second-generation self-developed GPGPU core LG200, the graphical performance has increased exponentially, supporting general calculation and AI acceleration; It integrates a wealth of IO interfaces and can be widely applied in various scenarios.
LS3B6000M Specification
Frequency
2.4GHz
Processor core
8 high-performance 64-bit LA364E cores; supporting LoongArch instruction set architecture; supporting 128-bit vector instructions; 3-issue out-of-order execution; 2 fixed-point units, 2 floating-point units and 2 memory access units
High-speed cache
Each processor core contains a 64KB private L1 instruction cache and a 64KB private L1 data cache; All processor cores share a 6MB L2 cache
GPU
Loongson' s self-developed second-generation core LG200; supporting OpenGL 3.3, OpenGL ES 3.1, OpenCL 1.1; supporting AI acceleration, ＞ 7TOPS (INT8)
VPU
decoding format HEVC/H264/VP8/VP7/AV1/MPEG4/JPEG; encoding format HEVC/H264/JPEG; maximum frame rate 4K60FPS
Display interfaces
Dual-GPU Triple-Display; supporting eDP, DP and HDMI; maximum resolution of 4K@60Hz
Memory controller
single-channel 64-bit DDR4 controller，or dual-channel 32-bit LPDDR4 controller
High-speed I/O
8 Lane PCIe3.0 4×USB3.1, 4×USB2.0 1×SATA3.0 2×Gigabit Ethernet port
Other I/O
eMMC, SDIO, SPI, LPC, HAD, I2S, UART, I2C, GPIO, etc.
Power management
supporting dynamic shutdown of the clocks of main modules; supporting dynamic frequency scaling in main clock domains; supporting dynamic frequency and voltage adjustments
