LS2P0300
LS2P0300
Loongson 2P0300 is a low-cost SoC chip designed for single/multi-function printer main control. It adopts a heterogeneous multi-core architecture, integrating one LA264 core, two LA132 processor cores, and 256KB of shared L2 cache. It also incorporates various functional modules such as DDR4, USB, OTG, GMAC, printer interface, scanner interface, imaging unit, eMMC, QSPI, and PWM. With multi-scenario power management capabilities, it can meet the requirements of various typical office applications including printing, scanning, and copying.
LS2P0300 Specification
Core
64-bit main cores LA264 and 32-bit small cores LA132
Frequency
main cores≥1.2GHz, small cores：400MHz
Power consumption
<1.0W(DVFS supported)
High-speed I/O
USB2.0×1, OTG×1, GMAC×1
Other interfaces
PRINTer, SCANNer, QSPI/SPI, eMMC, SDIO, ADC, I2C, UART, PWM, PMIO, GPIO, JTAG, etc.
Microarchitecture
Dual-issue out-of-order execution LA264 and single-issue LA132
L1 instruction cache
32KB for main cores and 4KB for small cores
L1 data cache
32KB for main cores and 4KB for small cores
L2 cache
Shared 256KB
Memory controller
8-bit DDR4-1600
